Pinch-off mechanism in double-lateral-gate junctionless transistors fabricated by scanning probe microscope based lithography

• Farhad Larki,
• Arash Dehzangi,
• Alam Abedini,
• Ahmad Makarimi Abdullah,
• Elias Saion,
• Sabar D. Hutagalung,
• Mohd N. Hamidon and
• Jumiah Hassan

Beilstein J. Nanotechnol. 2012, 3, 817–823, doi:10.3762/bjnano.3.91

• field emanating from the gates creates an electric field perpendicular to the current, toward the bottom of the channel, which provides the electrostatic squeezing of the current. Keywords: AFM nanolithography; junctionless transistors; pinch-off; scanning probe microscope; simulation; Introduction

• The fabrication of transistors without junctions and a doping concentration gradient has been introduced recently as a potential way to overcome the major obstacles in ultrascaled transistors [1][2]. Accordingly, based on simulation studies, performance estimates of junctionless transistors (JLTs

• ), quantum ballistic transport, and novel structures such as bulk planar junctionless transistors (BPJLTs) have also been investigated [3][4][5]. The idea behind the JLTs, or pinch-off transistors [6], is to simplify the source/drain engineering by removing the conventional junctions, and at the same time